Digital video decoders decode compressed digital data that represent video images in order to reconstruct the video images. Most transmitted video data is compressed and decompressed using, among other techniques, variable-length coding, such as Huffman coding. Huffman coding is a widely used technique for lossless data compression that achieves compact data representation by taking advantage of the statistical characteristics of the source. The Huffman code is a prefix-free variable-length code that assures that a code is uniquely decodable. In Huffman code, no codeword is the prefix of any other codeword. In some video compression formats, run-length processed data are often subsequently coded by variable-length coding for further data compression.
Variable-length encoding following the Huffman coding principle allocates codes of different lengths to different input data according to the probability of occurrence of the input data, so that statistically more frequent input codes are allocated shorter codes than the less frequent codes. The less frequent input codes are allocated longer codes. The allocation of codes may be done either statically or adaptively. For the static case, the same output code is provided for a given input datum, no matter what block of data is being processed. For the adaptive case, output codes are assigned to input data based on a statistical analysis of a particular input block or set of blocks of data, and possibly changes from block to block (or from a set of blocks to a set of blocks).
A relatively wide variety of encoding/decoding algorithms and encoding/decoding standards presently exists, and many additional algorithms and standards are sure to be developed in the future. The various algorithms and standards produce compressed video bitstreams of a variety of formats. Some existing public format standards include MPEG-1, MPEG-2 (used for standard definition, or SD, and high definition, or HD), MPEG-4, H.263, H.263+ and MPEG-4 AVC, also called H.264. Also, private standards have been developed by Microsoft Corporation (Windows Media), RealNetworks, Inc., Apple Computer, Inc. (QuickTime), and others. The combination of run-length coding and Huffman coding has been adopted in most compression/decompression standards. However, every standard has its own variable length code tables and run-length definitions. It would be desirable to have a multi-format decoding system that can decode a variety of variable-length encoded bitstream formats, including existing and future standards, and to do so in a cost-effective manner.
A highly optimized hardware architecture can be created to address a specific video decoding standard, but this kind of solution is typically limited to a single format. On the other hand, a fully software based solution is capable of handling any encoding format, but at the expense of performance. Currently, the latter case is solved in the industry by the use of general-purpose processors running on personal computers. Sometimes the general-purpose processor is accompanied by digital signal processor (DSP) oriented acceleration modules, like multiply-accumulate (MAC), that are intimately tied to the particular internal processor architecture. For example, in one existing implementation, an Intel Pentium processor is used in conjunction with an MMX acceleration module. Such a solution is limited in performance and does not lend itself to creating mass market, commercially attractive systems.
Others in the industry have addressed the problem of accommodating different encoding/decoding algorithms by designing special purpose DSPs in a variety of architectures. Some companies have implemented Very Long Instruction Word (VLIW) architectures more suitable to video processing and able to process several instructions in parallel. In these cases, the processors are difficult to program when compared to a general-purpose processor, and VLIW processors tend to have difficulty decoding variable length codes since the nature of the codes does not lend itself to parallel operations. In special cases, where the processors are dedicated for decoding compressed video, special processing accelerators are tightly coupled to the instruction pipeline and are part of the core of the main processor.
Yet others in the industry have addressed the problem of accommodating different encoding/decoding algorithms by simply providing multiple instances of hardware dedicated to a single algorithm. This solution is inefficient and is not cost-effective, and it not practical for all compressed video formats. Thus there is a need for a simple and flexible decoding system that can speedily and efficiently decode variable-length codes of varying standards.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.